The first component that realizes the two-decades-old search for analog hardware that mimics the learning ability of the human brain’s synapses and neurons has come to market. Based on memristors, the component from startup Knowm Inc. (Sante Fe, N.M.).
According to analysts, Knowm’s approach to using unique hardware to process Big Data streams in real time could lead to a unique new model for computer makers worldwide.
“Knowm is interesting for two reasons: its application of a some pretty heavy idea that if executed will have a positive import on the industry trying to move forward with Big Data,” service director for technology and software for at Current Analysis (London), Brad Shimmin told EE Times prior to the announcement today. “The biggest challenge of applying machine learning is being able to scale and Knowm’s unique perspective may be a able to solve that problem. I expect as they move forward they will need to partner with IBM, Hewlett Packard or Oracle who are trying to solve this problem with Big Data too.”
Other analysts agreed, plus added that Knowm’s BEOL service will give semiconductor makers worldwide access to Knowm’s technology during real-time processing of vast data streams.
“Digital computing infrastructure, based on switching digital bits and separating the functions of persisting data from processing, is now facing some big hurdles with Moore’s law. There simply isn’t enough power to meet the desires of those wishing to reach biological scale and density, whether evolving artificial intelligence or more practically scaling machine learning to ever larger big data sets,” senior analyst and consultant Mike Matchett at the Taneja Group Inc. (Hopkinton, Mass.) told us prior to the announcement today. “Knowm’s new solution stack impressively breaks through some of the traditional computing barriers by cleverly leveraging the analog hardware functionality of memristive circuits for both data persistence and direct ‘in-memory’ computing. They are providing a new way to approach machine learning at scale with chips of their new ‘synapses’, larger scale simulators, development libraries, and services to help layer on their memristive based designs right on top of traditional CMOS designs (through Back End of Line layering).”
Read the entire article directly on EETimes website at: http://www.eetimes.com/document.asp?doc_id=1327068&
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