In 2013, Pershin et al. published a paper showing an idealized memristor model for a device that changes it’s conductance as a function of the applied voltage. The paper can be downloaded here. This blog post is about taking the model from the paper and getting the classic memristor hysteresis I-V plot in NGSpice. It just so happens that the source code for NGSpice contains this model, so it’s really easy to get it working. These concepts can be adapted for different SPICE simulators and models. In addition we show the steps for installing NGSpice and simulating the memristor, compiling the latest NGSpice from source, and building ADMS into NGSpice for later Verilog-A integration with NGSpice. While these instructions are targeted towards a computer running MacOS and a packaging tool called homebrew, the steps should be similar to other systems such as Windows or Linux.

Install NGSpice the Simple Way

I’m using a Mac so I installed it via homebrew. See latest Ngspice Formula for more info.

Install NGSpice the Hard Way – Compile from Source

Dependencies with Homebrew

Install Autotools

NGSpice Dependencies with ADMS Support

ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of SPICE simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.

Building ADMS with Autotools will require some further Perl modules

Install into system-wide Perl

Let’s assume we have a directory for installing all the EDA tools called ~/workspaces/workspace_eda.

Clone the NGSpice Git repository

NOTE: we will be using the ‘ngspice (experimental)’ branch for supporting experimental features.

To install NGSpice, we will clone the source code and build it.

Build NGSpice with advanced features using Autotools

Build Flags

A full list of build flags can be found in the NGSPICE Manual on page 577.

–enable-adms ADMS is an experimental model compiler that translates Verilog-A compact
models into C code that can be compiled into ngspice. This is still experimental, but working
with some limitations to the models (e.g. no noise models). If you want to use it, please refer
to the ADMS section on ngspice web site.

–with-readline=yes Enable GNU readline support for the command line interface. Gives you command line history.

–with-x enables graphical environment

–enable-xspice Enable XSPICE enhancements, yielding a mixed signal simulator integrated
into ngspice with codemodel dynamic loading support. See chapter 12 and section II
for details

–enable-cider Cider is a mixed-level simulator that couples Spice3 and DSIM to simulate
devices from their technological parameters. This part of the simulator is not compiled by

Run HelloWorld Circuits

To quickly test NGSpice, we can run both a simple DC OP simulation and a simple transient analysis. First, create two files with the following text and save them somewhere on your hard drive.



Run the Simulations

NGSpice Transient Response

NGSpice Transient Response

Memristor Simulation with NGSpice

The following code can be found on the memristor-models-4-all project.

The Ngspice source code, which can be downloaded here, contains a memristor simulation in ngspice/examples/memristor/memristor.sp. The following code snippet shows the memristor simulation file.

Similar to a previously simulated memristor in LTSPICE using the Joglekar nonlinear drift window function, this simulation uses more or less the same concepts, but the exact model and implementation with SPICE sub-components is slightly different. There is also some syntax changes compared to LTSpice. Running the simulation produces the following plot.

NGSpice Memristor Hysteresis

NGSpice Memristor Hysteresis

The resulting I-V plot shows the familiar pinched hysteresis loop response of the memristor in response to a sinusoidal input.

NGSpice Links

Further Resources

Related Posts

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