Dhireesha Kudithipudi (kT-RAM Circuit Design)— received her B.S. in Electrical and Electronics Engineering from Nagarjuna University, India. She completed her M.S. in Computer Engineering from Wright State University and her Ph.D. in Electrical and Computer Engineering from University of Texas- San Antonio. Professor Kudithipudi’s research focuses on ultra-low power circuits and architectures, thermal management in multi-core architectures and 3D-ICs, emerging memory technologies, and design of biologically inspired architectures. Her work comprises design methodologies for 3D-ICs, circuits and architectures that are agnostic to a specific technology. Dr. Kudithipudi’s work on low power techniques and emerging devices (e.g.: RRAM) has impacted several applications including sensors, pace makers, RFIDs, cryptographic processors, and high-end computing systems. As a graduate student, Dr. Kudithipudi was a university presidential fellowship winner and received outstanding graduate research award for her dissertation work focused on static power optimization techniques in Nano-CMOS.
- M. Solitz, C. E. Merkel, D. Kudithipudi, and G.S. Rose. “RRAM-based Adaptive Neural Logic Block for Implementing Non-Linearly Separable Functions in a Single Layer.” In proceedings of IEEE/ACM symposium on Nanoscale Architectures’12 (2012): e85175.
- S.Mohanram, D.Brenner and D.Kudithipudi. “Hierarchical Optimization of TSV Placement with Inter-Tier Liquid Cooling in 3D-IC MPSoCs.” In proceedings of 29th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (2013).
- J.K.Hicks, D.Kudithipudi. “Hybrid Subthreshold and Nearthreshold Design Methodology for Energy Minimization.” J. Low Power Electronics, Vol. 7, N°2, pp 1-13 (2011).
- C.Merkel, D.Kudithipudi. “A Temperature Sensing RRAM Architecture for 3D-ICs.” IEEE Transactions on VLSI (2013).